/*
 * Copyright (c) 2020-2021, SERI Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2022-05-22     Lyons        first version
 */

module pa_fpu_falu_fadd_common_proc (
    clk_i,
    rst_n_i,

    src0_i,
    src1_i,

    single_i,
    double_i,

    sel_unit_i,
    sel_func_i,

    type_normal_i,
    type_subnormal_i,

    rm_i,

    ex1_clk_i,
    ex1_pipedown_i,
    ex1_cancel_i,
    ex2_clk_i,
    ex2_pipedown_i,
    ex2_cancel_i,
    ex3_clk_i,
    ex3_pipedown_i,
    ex3_cancel_i,

    fresult_o,
    fresult_vld_o
    );

`include "pa_fpu_param.v"

input                           clk_i;
input                           rst_n_i;

input                           src0_i;
input                           src1_i;

input                           single_i;
input                           double_i;

input                           sel_unit_i;
input                           sel_func_i;

input                           type_normal_i;
input                           type_subnormal_i;

input                           rm_i;

input                           ex1_clk_i;
input                           ex1_pipedown_i;
input                           ex1_cancel_i;
input                           ex2_clk_i;
input                           ex2_pipedown_i;
input                           ex2_cancel_i;
input                           ex3_clk_i;
input                           ex3_pipedown_i;
input                           ex3_cancel_i;

output                          fresult_o;
output                          fresult_vld_o;

wire                            clk_i;
wire                            rst_n_i;

wire [`FLOAT_WIDTH-1:0]         src0_i;
wire [`FLOAT_WIDTH-1:0]         src1_i;

wire                            single_i;
wire                            double_i;

wire [2:0]                      sel_unit_i;
wire [9:0]                      sel_func_i;

wire [2:0]                      type_normal_i;
wire [2:0]                      type_subnormal_i;

wire [2:0]                      rm_i;

wire                            ex1_clk_i;
wire                            ex1_pipedown_i;
wire                            ex1_cancel_i;
wire                            ex2_clk_i;
wire                            ex2_pipedown_i;
wire                            ex2_cancel_i;
wire                            ex3_clk_i;
wire                            ex3_pipedown_i;
wire                            ex3_cancel_i;

wire [`FLOAT_WIDTH-1:0]         fresult_o;
wire                            fresult_vld_o;


pa_fpu_xfrac_add_sub u_pa_fpu_xfrac_add_sub (
    .clk_i                      (clk_i),
    .rst_n_i                    (rst_n_i),

    .src0_i                     (src0_i),
    .src1_i                     (src1_i),

    .single_i                   (single_i),
    .double_i                   (double_i),

    .sel_unit_i                 (sel_unit_i),
    .sel_func_i                 (sel_func_i),

    .type_normal_i              (type_normal_i),
    .type_subnormal_i           (type_subnormal_i),

    .rm_i                       (rm_i),

    .ex1_clk_i                  (ex1_clk_i),
    .ex1_pipedown_i             (ex1_pipedown_i),
    .ex1_cancel_i               (ex1_cancel_i),
    .ex2_clk_i                  (ex2_clk_i),
    .ex2_pipedown_i             (ex2_pipedown_i),
    .ex2_cancel_i               (ex2_cancel_i),
    .ex3_clk_i                  (ex3_clk_i),
    .ex3_pipedown_i             (ex3_pipedown_i),
    .ex3_cancel_i               (ex3_cancel_i),

    .fresult_o                  (fresult_o),
    .fresult_vld_o              (fresult_vld_o)
);

endmodule